Differences

This shows you the differences between two versions of the page.

--- naivety_project [2026/05/13 13:29] – created top-level page for naivety_project iliketech
+++ naivety_project [2026/05/15 13:17] (current) – Added VRAM to memory map iliketech
@@ Line 2: / Line 2: @@
 This project covers the details of the design of a simple system on chip (SoC), including a custom CPU design and peripherals. This top-level page will include interconnection details, and links to the individual sections of the project.
+==== CPU ====
+The processor core for this project is a simple 16-bit processor known as Naivety Core. Details can be found here: [[naivety_core|Naivety Core]].
+==== Memory Map ====
+The memory map for this SoC is shown in the following table:
+^ Address ^ Region ^ Description ^
+^ 0x0000 | ROM | System ROM (16KiB) |
+^ 0x2000 | ::: | ::: |
+^ 0x4000 | Peripherals | CCU, 7 segment, etc. |
+^ 0x6000 |||
+^ 0x8000 |||
+^ 0xA000 | VRAM | Video Memory (8KiB) |
+^ 0xC000 | RAM | System RAM (16KiB) |
+^ 0xE000 | ::: | ::: |
+==== Peripheral Map ====
+A memory map with locations of all peripherals relative to the peripheral base of 0x4000 is shown in the following table:
+^ Address ^ Region ^ Description ^
+^ 0x0000 | CCU | Clock Control |
+^ 0x0400 | Segment Display| Seven Segment Display |
+^ 0x0800 | | |
+^ 0x0C00 | | |
+^ 0x1000 | | |
+^ 0x1400 | | |
+^ 0x1800 | | |
+^ 0x1C00 | | |